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[VHDL-FPGA-Verilog] 8b10b_Encoder

Description: 应用VHDL设计的8b10b 编码器，对串行数据的高速传输有用。-application VHDL design 8b10b encoding device to the high-speed serial data transmission useful.
Platform: | Size: 77824 | Author: | Hits:

[VHDL-FPGA-Verilog] E016_X-HDL3.2.52

Description: VHDL和Verilog代码互转工具,对EDA工程人员会有很大的帮助.-VHDL and Verilog code referrals tools, EDA staff to be very helpful.
Platform: | Size: 3962880 | Author: 张华 | Hits:

[VHDL-FPGA-Verilog] 8b10b_encdec

Description: VHDL写的8B10B编码解码器的实现，在Xilinx平台通过验证。-Written in VHDL coding 8B10B decoder realize, in the Xilinx platform validated.
Platform: | Size: 70656 | Author: 张开文 | Hits:

[VHDL-FPGA-Verilog] 8b10b_encdec

Description: 8b10b转换编码、解码verilog源代码-8b10b transcoding, decoding verilog source code
Platform: | Size: 70656 | Author: wx | Hits:

[3G develop] 8B10B

Description: 8B10B编解码的较为详细的介绍，8B10B是目前的很多通信网络采用的编解码标准。-8B10B encoding and decoding of a more detailed introduction.
Platform: | Size: 21504 | Author: chenjin | Hits:

[VHDL-FPGA-Verilog] 8b10bverilog

Description: 基于verilogHDL语言的8b10通信变换。-verilog 8b10b
Platform: | Size: 5120 | Author: ckj | Hits:

[Other] 8b10b

Description: 8b10b转换编码的verilog描述，非常好-8b/10b trans
Platform: | Size: 8192 | Author: 吴增海 | Hits:

[assembly language] encode

Description: 用verilog写的8B10B编码源代码。似乎有点难度来理解。这里并未使用case语句，而是完全的用的组合逻辑化简-Use verilog write 8B10B encoding source code. Seems difficulty understood.
Platform: | Size: 1024 | Author: 颜回中 | Hits:

[VHDL-FPGA-Verilog] SERDES

Description: 基于Verilog的串并转换器的设计与实现，采用两种不同的方案来实现串并和并串转换的功能，并用ISE软件仿真以及chipscope的调试-Verilog-based serial and parallel converter design and implementation of two different programs to achieve the string and and and string conversion functions, and use the ISE software simulation and debugging chipscope
Platform: | Size: 785408 | Author: 陈凯 | Hits:

[VHDL-FPGA-Verilog] Altera_IP_verilog

Description: Altera IP的产生与实现。定制一个8B10B编码器，采用verilog语言建立仿真模型，并验证。-Altera IP generation and implementation. Customize a 8B10B encoder, using verilog language, a simulation model, and verify.
Platform: | Size: 395264 | Author: Gorce | Hits:

[VHDL-FPGA-Verilog] encode_8bl0b

Description: 8b10b的verilog编码程序，已经验证过没有问题，效果比以前的要好-8b10b the verilog coding process has been proven there is no problem, the effect is better than before
Platform: | Size: 1024 | Author: 孙翠 | Hits:

[EditBox] LIB5002_CW_8b10b_enc

Description: Verilog 8b10b encoder source code
Platform: | Size: 18432 | Author: jc | Hits:

[Goverment application] LIB5001_CW_8b10b_dec

Description: CW 8b10b Verilog source decoder code
Platform: | Size: 36864 | Author: jc | Hits:

[VHDL-FPGA-Verilog] encoder-8b10b

Description: 可以实现8b10b编码，verilog源程序，经过测试-8b10b Encoder
Platform: | Size: 2048 | Author: 华香凝 | Hits:

[VHDL-FPGA-Verilog] decoder-8b10b

Description: 可实现8b10b解码的verilog程序，经过测试-8b10b decoder，verilog
Platform: | Size: 2048 | Author: 华香凝 | Hits:

[VHDL-FPGA-Verilog] 8b10b

Description: 8b10b编解码，用于光通信和千兆以太网，verilog编写，已验证-8b10b codec for optical communications and Gigabit Ethernet, verilog prepared Verified
Platform: | Size: 7168 | Author: 容易 | Hits:

[VHDL-FPGA-Verilog] verilog8B10B

Description: verilog HDL语言实现的8B10B程序，经过仿真可运行-8B10B verilog HDL language of the program, through simulation can be run
Platform: | Size: 241664 | Author: 王琦 | Hits:

[Communication-Mobile] 8b10b Verilog

Description: 采用verilog语言基于查找表描述8b10b编码源代码(Using Verilog language to describe 8B10B encoding source code based on look-up table)
Platform: | Size: 1024 | Author: 臭猴子 | Hits:

[VHDL-FPGA-Verilog] encode_cell

Description: ISE14.7平台，实现verilog的8b10b编解码。(verilog in ise for 8b10b decode and incode)
Platform: | Size: 1206272 | Author: 落叶无情1992 | Hits:

[Other] 8b10b Verilog

Description: 8bit/10bit编码Verilog实现(8bit/10bit Verilog Code)
Platform: | Size: 1024 | Author: JasonYang397 | Hits:
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