Search - 4 bit alu

[VHDL-FPGA-Verilog] alu

Description: 4位ALU逻辑运算单元，可进行加法、减法、逻辑运算、移位等操作。-4 ALU logical operation unit, can be additive, subtraction, logic operations, shift and other operations.
Platform: | Size: 1024 | Author: 甲天下 | Hits:

Description: 4bit ALU（运算逻辑单元）的设计给出了此次设计alu的输入输出结构及相应的位数。其中C0是一位的进位输入，A和B分别是4位的数据输入，S0、S1、M分别为一位的功能选择输入信号；Cout是一位的进位输出，F是4为的运算结果输出。-4bit ALU (arithmetic logic unit) design is given in the design of alu input and output structure and the corresponding median. C0 which is a binary input of, A and B are four data entry, S0, S1, M, respectively, as a function of choice of the input signal Cout of a binary output, F is 4 for computing the results of output.
Platform: | Size: 1024 | Author: chenyi | Hits:

[VHDL-FPGA-Verilog] alu_16

Description: 三种16位整数运算器的ALU设计方法，调用库函数74181（4位ALU），组成串行16位运算器。(用74181的正逻辑) B．调用库函数74181和74182，组成提前进位16位运算器。(用74181的正逻辑) 注意：调74181库设计，加进位是“0”有效，减借位是“1”有效，所以最高位进位或借位标志寄存器要统一调整到高有效 C．用always @，case方式描述16位运算器。-Three 16-bit integer arithmetic logic unit of the ALU design methodology, called library function 74181 (4 ALU), composed of serial 16-bit arithmetic logic unit. (With 74,181 positive logic) B. Call library functions 74181 and 74182 to form the advance into the 16-bit arithmetic logic unit. (With 74,181 positive logic) Note: 74,181 Treasury tune the design, add bit is
Platform: | Size: 1024 | Author: yifang | Hits:

[Other systems] 4BIT_ALU

Description: this program performs the functonality of 4 bit alu
Platform: | Size: 193536 | Author: v.k.sreedhar | Hits:

[VHDL-FPGA-Verilog] 4bitALU

Description: 4 bit ALU 设计功能仿真和门级仿真结果 -4 bit ALU
Platform: | Size: 104448 | Author: 吴涵 | Hits:

[VHDL-FPGA-Verilog] 4_Bit_Alu_vhdl

Description: Complete VHDL Code for a 4 BIT ALU PROJECT
Platform: | Size: 22528 | Author: jassu | Hits:

[VHDL-FPGA-Verilog] 16bitalu

Description: 16 bit alu using the vhdl it has 16 function perform by control unit with 4 control signal
Platform: | Size: 1002496 | Author: jai | Hits:

[VHDL-FPGA-Verilog] 4ALU

Description: The project is used to perform the operation of 4 bit arethmatic and logical operation. the projcet is implemented in spartan 3E
Platform: | Size: 483328 | Author: asit | Hits:

[SCM] alu_final

Description: This a program which performs addition,subtraction,multiplication and division of two 4 bit binary numbers..therefore it is called as 4 bit binary ALU..if u have any doubt,then mail me at prem_bombay@yahoo.co.in -This is a program which performs addition,subtraction,multiplication and division of two 4 bit binary numbers..therefore it is called as 4 bit binary ALU..if u have any doubt,then mail me at prem_bombay@yahoo.co.in
Platform: | Size: 1024 | Author: SUMIT | Hits:

[Software Engineering] ALU

Description: Write an 8085 ALP to design a 4-bit ALU. The ALU should be able to perform addition, subtraction, AND operation, OR operation on 4-bit inputs based on the desired operation
Platform: | Size: 1024 | Author: debojit | Hits:

[Windows Develop] Alu-4bit

Description: alu 4 bit with verilog in modelsim and work correct
Platform: | Size: 41984 | Author: sara | Hits:

[VHDL-FPGA-Verilog] 4

Description: simple code based on verilog shifter , cla ,clg , ALU , PC
Platform: | Size: 3072 | Author: Tera | Hits:

[VHDL-FPGA-Verilog] ALU

Description: a simple 4 bit alu in verilog
Platform: | Size: 612352 | Author: priya | Hits:

[Other] Alu

Description: 4位ALU逻辑运算器，用VHDL语言编写-4-bit ALU process using VHDL
Platform: | Size: 1024 | Author: mike | Hits:

[VHDL-FPGA-Verilog] ALU

Description: this is a 4 bit alu design-this is a 4 bit alu design
Platform: | Size: 439296 | Author: waqas | Hits:

[VHDL-FPGA-Verilog] alu[1].eg1

Description: A 32-Bit ALU Design Example
Platform: | Size: 46080 | Author: vinoth | Hits:

[VHDL-FPGA-Verilog] alu

Description: This 8 bit unsigned arithematic logical unit(ALU). This code is developed in VHDL language and compatible with any VHDL softeware like xilinx,quartus. This ALU performs addition,subtraction,multiplication,and,or,and not and pass input functions.-This is 8 bit unsigned arithematic logical unit(ALU). This code is developed in VHDL language and compatible with any VHDL softeware like xilinx,quartus. This ALU performs addition,subtraction,multiplication,and,or,and not and pass input functions.
Platform: | Size: 94208 | Author: chunduru | Hits:

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list

[VHDL-FPGA-Verilog] alu

[VHDL-FPGA-Verilog] alu

[VHDL-FPGA-Verilog] alu_16

[Other systems] 4BIT_ALU

[VHDL-FPGA-Verilog] 4bitALU

[VHDL-FPGA-Verilog] 4_Bit_Alu_vhdl

[VHDL-FPGA-Verilog] 16bitalu

[VHDL-FPGA-Verilog] 4ALU

[SCM] alu_final

[Software Engineering] ALU

[Windows Develop] Alu-4bit

[VHDL-FPGA-Verilog] 4

[VHDL-FPGA-Verilog] ALU

[Other] Alu

[VHDL-FPGA-Verilog] ALU

[VHDL-FPGA-Verilog] alu[1].eg1

[VHDL-FPGA-Verilog] alu

[VHDL-FPGA-Verilog] alu

[VHDL-FPGA-Verilog] alu

[VHDL-FPGA-Verilog] 4-bit-ALU

CodeBus www.codebus.net