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Description: wallace tree
用于16位乘法器的verilog 的 wallace tree代码 -wallace tree verilog file. 16bit wallace tree adder.
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Size: 2048 |
Author: Zachary |
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Description: 一种可以完成16位有符号／无符号二进制数乘法的乘法器。该乘法器采用了改进的booth算法，简化了部分积的符号扩展，采用Wallace树和超前进位加法器来进一步提高电路的运算速度。本乘法器可以作为嵌入式CPU内核的乘法单元，整个设计用VHDL语言实现。- This file contains all the entity-architectures for a complete-- k-bit x k-bit Booth multiplier.-- the design makes use of
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Size: 358400 |
Author: zhou |
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Description: 16位有符号数乘法器，使用Booth编码和华莱士树，提供程序源文件和测试文件(The 16 bit signed multiplier uses Booth encoding and Wallace tree to provide source files and test files.)
Platform: |
Size: 6144 |
Author: Yongsen Wang |
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