Description: DM9000技術文件
ISA to Ethernet MAC Controller with Intergrated 10/100 PHY-DM9000 technical documents ISA to Ethernet MAC Controller with Intergrated 10/100 PHY Platform: |
Size: 33792 |
Author:ndd28153 |
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Description: ADM6996F交换机说明,MAC can be configured as PCS type MII with 10/100 PHY -The ADM6996F is a high performance, low cost, highly integrated (Controller, PHY and
Memory) four-port 10/100 Mbps TX/FX plus two 10/100 MAC port Ethernet switch
controller with all ports supporting 10/100 Mbps Full/Half duplex. The ADM6996F is
intended for applications to stand alone bridge for low cost SOHO markets such as 5Port,
Router applications. The 2nd
MAC can be configured as PCS type MII with 10/100 PHY
integrated. Platform: |
Size: 772096 |
Author:liyonghui |
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Description: The LogiCORE™ IP Tri-Mode Ethernet Media Access
Controller (TEMAC) solution comprises the
10/100/1000 Mbps Ethernet MAC, 1 Gbps Ethernet
MAC and the 10/100 Mbps Ethernet MAC IP core. All
cores support half-duplex and full-duplex operation-The LogiCORE™ IP Tri-Mode Ethernet Media Access
Controller (TEMAC) solution comprises the
10/100/1000 Mbps Ethernet MAC, 1 Gbps Ethernet
MAC and the 10/100 Mbps Ethernet MAC IP core. All
cores support half-duplex and full-duplex operation Platform: |
Size: 248832 |
Author:zhang |
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Description: SMII接口的mac控制器，通过测试。使用verilog语言！-The Serial Media Independent Interface, SMMI, is a low pin count version of the MII normally used between ethernet MAC and PHY.
The Serial Media Independent Interface (SMII) is designed to satisfy the following requirements:
Convey complete MII information between a 10/100 PHY and MAC with two pins per port
allow multi port MAC/PHY communications with one system clock
Operate in both half and full duplex
per packet switching between 10 Mbit and 100 Mbit data rates
allow direct MAC to MAC communication
Platform: |
Size: 1035264 |
Author:weixin |
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Description: 嵌入式串口转以太网控制器，以下简称S2E21，是一款具有高效性能并集成了ARM Cortex-M3微处理器的串行至以太网控制器。该控制器的核心是高度集成的32位Stellaris LM3S6432 ARM Cortex-M3微处理器，具有50MHz性能和96K快速单周期片上闪存及32K SARAM内存，可高效处理网络流量。Stellaris系列微处理器采用LQFP-100 封装，并集成了片上10/100MB以太网MAC和PHY，从而能够最大限度的节省空间。-Embedded Serial to Ethernet controller, hereinafter referred to S2E21, is a highly efficient performance and the integration of ARM Cortex-M3 microprocessor serial-to-Ethernet controller. The controller' s core is a highly integrated 32-bit Stellaris LM3S6432 ARM Cortex-M3 microcontroller with 50MHz single-cycle performance and fast 96K and 32K SARAM on-chip flash memory, can efficiently handle network traffic. Stellaris family of microprocessors LQFP-100 package, and integrates on-chip 10/100MB Ethernet MAC and PHY, allowing maximum space savings. Platform: |
Size: 9331712 |
Author:kdlipm |
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Description: The RT3052 SOC combines Ralink’s 802.11n draft
compliant 2T2R MAC/BBP/RF, a high performance
384MHz MIPS24KEc CPU core, 5-port integrated
10/100 Ethernet switch/PHY, an USB OTG and a
Gigabit Ethernet MAC. With the RT3052, there are
very few external components required for 2.4GHz
11n wireless products. The RT3052 employs Ralink
2nd generation 11n technologies for longer range and
better throughput. The embedded high performance
CPU can process advanced applications effortlessly,
such as routing, security and VOIP. The USB por t can
be configured to access external storage for Digital
Home applications. In addition, the RT3052 has rich
hardware interfaces (SPI/I2S/I2C/UART/GMAC) to
enable many possible applications. Platform: |
Size: 3311616 |
Author:Andy |
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Description: 以太网IP Core 它实现10/100 Mbps的MAC控制器功能。它是在IEEE802.3和802.3u 标准下设计实现的。-The Ethernet IP Core is a 10/100 Media Access Controller (MAC). It consists of a synthesizable Verilog RTL core that provides all features necessary to implement the Layer 2 protocol of
the Ethernet standard. It is designed to run
according to the IEEE 802.3 and 802.3u
specifications that define the 10 Mbps and 100 Mbps Ethernet standards, respectively. Platform: |
Size: 18925568 |
Author:haizi |
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Description: The Ethernet IP Core is a MAC (Media Access Controller). It connects to the
Ethernet PHY chip on one side and to the WISHBONE SoC bus on the other.
The core has been designed to offer as much flexibility as possible to all kinds of applications.-The Ethernet IP Core is a MAC (Media Access Controller). It connects to the
Ethernet PHY chip on one side and to the WISHBONE SoC bus on the other.
The core has been designed to offer as much flexibility as possible to all kinds of applications. Platform: |
Size: 19430400 |
Author:ke |
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Description: W5500电路图、W5500模块原理图_核心板图，最高80MHz,SPI接口-The W5500 chip is a Hardwired TCP/IP embedded Ethernet controller that provides
easier Internet connection to embedded systems. W5500 enables users to have the
Internet connectivity in their applications just by using the single chip in which
TCP/IP stack, 10/100 Ethernet MAC and PHY embedded. Platform: |
Size: 59392 |
Author:王广龙 |
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Description: this is using mac IP core for ethernet connection in ISE xilinx for ethernet 10/100 Platform: |
Size: 10025984 |
Author:hosseinkhani
|
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Description: The W5500 chip is a Hardwired TCP/IP embedded Ethernet controller that provides
easier Internet connection to embedded systems. W5500 enables users to have the
Internet connectivity in their applications just by using the single chip in which TCP/IP
stack, 10/100 Ethernet MAC and PHY embedded.
WIZnet‘s Hardwired TCP/IP is the market-proven technology that supports TCP, UDP,
IPv4, ICMP, ARP, IGMP, and PPPoE protocols. W5500 embeds the 32Kbyte internal
memory buffer for the Ethernet packet processing. If you use W5500, you can
implement the Ethernet application just by adding the simple socket program. It’s
faster and easier way rather than using any other Embedded Ethernet solution. Users
can use 8 independent hardware sockets simultaneously.
SPI (Serial Peripheral Interface) is provided for easy integration with the external
MCU. The W5500’s SPI supports 80 MHz speed and new efficient SPI protocol for the
high speed network communication. In order to reduce power consumption of the
system, W5500 provides WOL (Wake on LAN) and power down mode. Platform: |
Size: 1492601 |
Author:bezr41@gmail.com |
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