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[
VHDL-FPGA-Verilog
]
sdr_data_path
Description:
SDRAM控制器Verilog员代码，数据链路模块，完成和顶层模块的数据交换-SDRAM controller member Verilog code, data link module, Top module completed and the data exchange
Platform:
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Size:
2048
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Author:
陈建勇
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