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[VHDL-FPGA-Verilog] quartusii

Description: 推荐!!!!!学ASIC相当不错的教程!!!!还是可以看看的-recommended !!!!! school ASIC fairly good tutorial! ! ! ! Or can see!
Platform: | Size: 844800 | Author: 安安 | Hits:

[VHDL-FPGA-Verilog] my_ip_core

Description: 在quartusII下用verilog语言自己写的IP核，对FPGA开发初学者有帮助的。-in quartusII verilog using their own language to write the IP core, FPGA development beginners to help.
Platform: | Size: 51200 | Author: 刘海 | Hits:

[VHDL-FPGA-Verilog] S6_VGA_change

Description: verilog源代码，quartusII工程。程序实现VGA时序。控制VGA显示器输出图形。在quartusII中客直接运行，-Verilog source code, quartusII works. Procedures to achieve VGA timing. VGA graphics display control output. QuartusII in the direct run-off,
Platform: | Size: 2572288 | Author: 李晨 | Hits:

[Books] quartusII

Description: 简单介绍了Quartus2的应用，具体内容大家可以下载下来看看，-Quartus2 briefly introduced the application of the specific content can be downloaded to see everyone,
Platform: | Size: 846848 | Author: 赵晓阳 | Hits:

[VHDL-FPGA-Verilog] PPM

Description: ppm脉位调制数字基带系统的设计，包括完整的QuartusII工程和Ｍodelsim仿真文件-ppm PPM digital base-band system design, including complete engineering and QuartusII ModelSim simulation files
Platform: | Size: 254976 | Author: wanyou | Hits:

[VHDL-FPGA-Verilog] uart

Description: 基于FPGA的uart控制器，波特率可选，VHDL编程，Quartusii 6.0 平台，vhdl语言编程-FPGA-based UART controller, an optional baud rate, VHDL programming, Quartusii 6.0 platform, vhdl language programming
Platform: | Size: 5093376 | Author: 吕常智 | Hits:

[VHDL-FPGA-Verilog] dianhuajifei

Description: Verilog语言编写的电话计费系统，这只是源代码，需要在quartusII等软件下运用-Verilog language telephone billing system, this is only the source code, the need to use software such as quartusII
Platform: | Size: 301056 | Author: 王阳 | Hits:

[VHDL-FPGA-Verilog] golomb

Description: golomb编码，用于无损图像压缩等，基于quartusii平台。-golomb coding for lossless image compression, based on the platform quartusii.
Platform: | Size: 151552 | Author: Tangyao | Hits:

[VHDL-FPGA-Verilog] CMI_endecod

Description: Verilog HDL实现CMI编码和解码，在QuartusII下完成仿真验证。-CMI encoder an decoder using Verilog HDL.
Platform: | Size: 300032 | Author: 离间 | Hits:

[VHDL-FPGA-Verilog] miniprinter

Description: 微型打印机模块实验.rar；基于FPGA-2C35核心；博创实验箱平台。 在quartusII里面添加uart核，nios II的Console构成人机交互界面，串口与微型打印机通信，打印出数据。 -Micro printer module experiment rar core on the FPGA-2C35 Borch experimental box platform. QuartusII inside to add the uart nuclear, nios II Console constitute a man-machine interface, serial ports, and micro-printer communications, print out the data.
Platform: | Size: 13145088 | Author: | Hits:

[VHDL-FPGA-Verilog] zigbee_sensor

Description: ZigBee无线模块实验.rar；基于FPGA-2C35核心；博创实验箱平台。 在quartusII里面添加uart核，利用串口与主控制机相通信，获取从控制机上传感器的的温度、湿度、光敏电阻、热敏电阻等信息（其中主控制机与从控制机是通过zigbee协议通信） -ZigBee wireless module experiment rar core on the FPGA-2C35 Borch experimental box platform. Add uart nuclear quartusII inside, using the serial port with the main control machine communication, access to the sensor from the control on the temperature, humidity, photoresistors, thermistors, and other information (including the main control machine from the control machine by zigbee protocol communications)
Platform: | Size: 1388544 | Author: | Hits:

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