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Title: i2c_latest Download
 Description: I2C verilog code, it is a simple I2C project includes doc
 Downloaders recently: [More information of uploader yunzhiying]
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File list (Click to check if it's the file you need, and recomment it at the bottom):
文件名大小更新时间
i2c_latest 0 2020-11-20
i2c_latest\i2c 0 2019-08-20
i2c_latest\i2c\branches 0 2019-08-20
i2c_latest\i2c\tags 0 2019-08-20
i2c_latest\i2c\tags\asyst_2 0 2019-08-20
i2c_latest\i2c\tags\asyst_2\rtl 0 2019-08-20
i2c_latest\i2c\tags\asyst_2\rtl\verilog 0 2019-08-20
i2c_latest\i2c\tags\asyst_2\rtl\verilog\i2c_master_bit_ctrl.v 16767 2003-08-09
i2c_latest\i2c\tags\asyst_2\rtl\verilog\i2c_master_byte_ctrl.v 10272 2003-08-09
i2c_latest\i2c\tags\asyst_2\rtl\verilog\i2c_master_defines.v 3011 2001-11-05
i2c_latest\i2c\tags\asyst_2\rtl\verilog\i2c_master_top.v 9770 2003-09-01
i2c_latest\i2c\tags\asyst_2\rtl\verilog\timescale.v 23 2001-09-24
i2c_latest\i2c\tags\asyst_3 0 2019-08-20
i2c_latest\i2c\tags\asyst_3\rtl 0 2019-08-20
i2c_latest\i2c\tags\asyst_3\rtl\verilog 0 2019-08-20
i2c_latest\i2c\tags\asyst_3\rtl\verilog\i2c_master_bit_ctrl.v 16767 2003-08-09
i2c_latest\i2c\tags\asyst_3\rtl\verilog\i2c_master_byte_ctrl.v 10272 2003-08-09
i2c_latest\i2c\tags\asyst_3\rtl\verilog\i2c_master_defines.v 3011 2001-11-05
i2c_latest\i2c\tags\asyst_3\rtl\verilog\i2c_master_top.v 9770 2003-09-01
i2c_latest\i2c\tags\asyst_3\rtl\verilog\timescale.v 23 2001-09-24
i2c_latest\i2c\tags\first 0 2019-08-20
i2c_latest\i2c\tags\first\I2C.VHD 13542 2001-01-03
i2c_latest\i2c\tags\first\tst_ds1621.vhd 6959 2001-01-03
i2c_latest\i2c\tags\rel_1 0 2019-08-20
i2c_latest\i2c\tags\rel_1\bench 0 2019-08-20
i2c_latest\i2c\tags\rel_1\bench\verilog 0 2019-08-20
i2c_latest\i2c\tags\rel_1\bench\verilog\i2c_slave_model.v 10798 2003-09-11
i2c_latest\i2c\tags\rel_1\bench\verilog\tst_bench_top.v 12976 2002-10-31
i2c_latest\i2c\tags\rel_1\bench\verilog\wb_master_model.v 5566 2002-03-17
i2c_latest\i2c\tags\rel_1\doc 0 2019-08-20
i2c_latest\i2c\tags\rel_1\doc\i2c_specs.pdf 211471 2003-07-03
i2c_latest\i2c\tags\rel_1\doc\src 0 2019-08-20
i2c_latest\i2c\tags\rel_1\doc\src\I2C_specs.doc 464896 2003-07-03
i2c_latest\i2c\tags\rel_1\rtl 0 2019-08-20
i2c_latest\i2c\tags\rel_1\rtl\verilog 0 2019-08-20
i2c_latest\i2c\tags\rel_1\rtl\verilog\i2c_master_bit_ctrl.v 16767 2003-08-09
i2c_latest\i2c\tags\rel_1\rtl\verilog\i2c_master_byte_ctrl.v 10272 2003-08-09
i2c_latest\i2c\tags\rel_1\rtl\verilog\i2c_master_defines.v 3011 2001-11-05
i2c_latest\i2c\tags\rel_1\rtl\verilog\i2c_master_top.v 9770 2003-09-01
i2c_latest\i2c\tags\rel_1\rtl\verilog\timescale.v 23 2001-09-24
i2c_latest\i2c\tags\rel_1\rtl\vhdl 0 2019-08-20
i2c_latest\i2c\tags\rel_1\rtl\vhdl\I2C.VHD 13542 2001-09-24
i2c_latest\i2c\tags\rel_1\rtl\vhdl\i2c_master_bit_ctrl.vhd 17175 2003-08-12
i2c_latest\i2c\tags\rel_1\rtl\vhdl\i2c_master_byte_ctrl.vhd 12433 2003-08-09
i2c_latest\i2c\tags\rel_1\rtl\vhdl\i2c_master_top.vhd 12966 2003-08-09
i2c_latest\i2c\tags\rel_1\rtl\vhdl\readme 789 2002-12-01
i2c_latest\i2c\tags\rel_1\rtl\vhdl\tst_ds1621.vhd 6959 2001-09-24
i2c_latest\i2c\tags\rel_1\sim 0 2019-08-20
i2c_latest\i2c\tags\rel_1\sim\i2c_verilog 0 2019-08-20
i2c_latest\i2c\tags\rel_1\sim\i2c_verilog\run 0 2019-08-20
i2c_latest\i2c\tags\rel_1\sim\i2c_verilog\run\bench.vcd 5316039 2002-06-15
i2c_latest\i2c\tags\rel_1\sim\i2c_verilog\run\ncverilog.key 5 2002-06-15
i2c_latest\i2c\tags\rel_1\sim\i2c_verilog\run\ncverilog.log 4697 2002-06-15
i2c_latest\i2c\tags\rel_1\sim\i2c_verilog\run\run 597 2002-06-15
i2c_latest\i2c\tags\rel_1\software 0 2019-08-20
i2c_latest\i2c\tags\rel_1\software\include 0 2019-08-20
i2c_latest\i2c\tags\rel_1\software\include\oc_i2c_master.h 5724 2001-11-22
i2c_latest\i2c\trunk 0 2019-08-20
i2c_latest\i2c\trunk\bench 0 2019-08-20
i2c_latest\i2c\trunk\bench\verilog 0 2019-08-20
i2c_latest\i2c\trunk\bench\verilog\i2c_slave_model.v 11425 2006-09-04
i2c_latest\i2c\trunk\bench\verilog\spi_slave_model.v 3840 2004-02-28
i2c_latest\i2c\trunk\bench\verilog\tst_bench_top.v 14491 2006-09-04
i2c_latest\i2c\trunk\bench\verilog\wb_master_model.v 5566 2004-02-28
i2c_latest\i2c\trunk\doc 0 2019-08-20
i2c_latest\i2c\trunk\doc\i2c_specs.pdf 211471 2003-07-03
i2c_latest\i2c\trunk\doc\src 0 2019-08-20
i2c_latest\i2c\trunk\doc\src\I2C_specs.doc 464896 2003-07-03
i2c_latest\i2c\trunk\rtl 0 2019-08-20
i2c_latest\i2c\trunk\rtl\verilog 0 2019-08-20
i2c_latest\i2c\trunk\rtl\verilog\i2c_master_bit_ctrl.v 21121 2010-01-13
i2c_latest\i2c\trunk\rtl\verilog\i2c_master_byte_ctrl.v 10547 2009-01-20
i2c_latest\i2c\trunk\rtl\verilog\i2c_master_defines.v 3011 2001-11-05
i2c_latest\i2c\trunk\rtl\verilog\i2c_master_top.v 10053 2010-01-13
i2c_latest\i2c\trunk\rtl\verilog\timescale.v 23 2001-09-24
i2c_latest\i2c\trunk\rtl\vhdl 0 2019-08-20
i2c_latest\i2c\trunk\rtl\vhdl\I2C.VHD 13542 2001-09-24
i2c_latest\i2c\trunk\rtl\vhdl\i2c_master_bit_ctrl.vhd 24493 2010-06-06
i2c_latest\i2c\trunk\rtl\vhdl\i2c_master_byte_ctrl.vhd 12630 2004-02-18
i2c_latest\i2c\trunk\rtl\vhdl\i2c_master_top.vhd 14956 2010-01-13
i2c_latest\i2c\trunk\rtl\vhdl\readme 789 2002-12-01
i2c_latest\i2c\trunk\rtl\vhdl\tst_ds1621.vhd 6959 2001-09-24
i2c_latest\i2c\trunk\sim 0 2019-08-20
i2c_latest\i2c\trunk\sim\i2c_verilog 0 2019-08-20
i2c_latest\i2c\trunk\sim\i2c_verilog\run 0 2019-08-20
i2c_latest\i2c\trunk\sim\i2c_verilog\run\bench.vcd 5316039 2002-06-15
i2c_latest\i2c\trunk\sim\i2c_verilog\run\ncverilog.key 5 2002-06-15
i2c_latest\i2c\trunk\sim\i2c_verilog\run\ncverilog.log 4697 2002-06-15
i2c_latest\i2c\trunk\sim\i2c_verilog\run\run 514 2007-04-06
i2c_latest\i2c\trunk\software 0 2019-08-20
i2c_latest\i2c\trunk\software\include 0 2019-08-20
i2c_latest\i2c\trunk\software\include\oc_i2c_master.h 5724 2001-11-22
i2c_latest\i2c\web_uploads 0 2019-08-20
i2c_latest\i2c\web_uploads\Block.gif 8092 2009-03-10
i2c_latest\i2c\web_uploads\i2c_rev03.pdf 78476 2009-03-10
i2c_latest\i2c\web_uploads\index.shtml 1776 2009-03-10
i2c_latest\i2c\web_uploads\index_orig.shtml 1623 2009-03-10

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