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Title: lsd2 Download
  • Category:
  • Other systems
  • Platform:
  • Verilog
  • File Size:
  • 2231296
  • Update:
  • 2019-01-12
  • Downloads:
  • 0
  • Uploaded by:
  • @木鱼@
 Description: The Pipeline Lamp Program Written in Verilog Language
 Downloaders recently: [More information of uploader @木鱼@]
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File list (Click to check if it's the file you need, and recomment it at the bottom):
文件名大小更新时间
lsd2\db\.cmp.kpt 202 2018-12-24
lsd2\db\lsd.db_info 144 2019-01-12
lsd2\db\lsd.sld_design_entry.sci 227 2019-01-12
lsd2\db\prev_cmp_lsd.qmsg 35103 2018-12-24
lsd2\incremental_db\compiled_partitions\lsd.db_info 144 2019-01-12
lsd2\incremental_db\README 653 2018-12-08
lsd2\lsd.qpf 1338 2018-12-08
lsd2\lsd.qsf 4118 2019-01-12
lsd2\lsd.qws 606 2019-01-12
lsd2\lsd.v 721 2018-12-24
lsd2\lsd.v.bak 683 2018-12-20
lsd2\lsd_assignment_defaults.qdf 54531 2019-01-12
lsd2\lsd_nativelink_simulation.rpt 962 2018-12-18
lsd2\lsd_tb.v 3191 2018-12-20
lsd2\lsd_tb.v.bak 3191 2018-12-20
lsd2\output_files\Chain1.cdf 395 2018-12-24
lsd2\output_files\Chain3.cdf 395 2018-12-20
lsd2\output_files\Chain4.cdf 395 2018-12-24
lsd2\output_files\Chain5.cdf 395 2018-12-24
lsd2\output_files\lsd.asm.rpt 4558 2018-12-24
lsd2\output_files\lsd.done 26 2018-12-24
lsd2\output_files\lsd.eda.rpt 6129 2018-12-24
lsd2\output_files\lsd.fit.rpt 53382 2018-12-24
lsd2\output_files\lsd.fit.smsg 370 2018-12-24
lsd2\output_files\lsd.fit.summary 365 2018-12-24
lsd2\output_files\lsd.flow.rpt 8596 2018-12-24
lsd2\output_files\lsd.jdi 222 2018-12-24
lsd2\output_files\lsd.map.rpt 20502 2018-12-24
lsd2\output_files\lsd.map.summary 304 2018-12-24
lsd2\output_files\lsd.pin 15317 2018-12-24
lsd2\output_files\lsd.pof 7865 2018-12-24
lsd2\output_files\lsd.sld 21 2018-12-24
lsd2\output_files\lsd.sta.rpt 38192 2018-12-24
lsd2\output_files\lsd.sta.summary 401 2018-12-24
lsd2\simulation\modelsim\lsd.sft 104 2018-12-24
lsd2\simulation\modelsim\lsd.vo 45440 2018-12-24
lsd2\simulation\modelsim\lsd.vt 3092 2018-12-18
lsd2\simulation\modelsim\lsd.vt.bak 3004 2018-12-17
lsd2\simulation\modelsim\lsd_modelsim.xrf 2677 2018-12-24
lsd2\simulation\modelsim\lsd_run_msim_rtl_verilog.do 1717 2018-12-18
lsd2\simulation\modelsim\lsd_run_msim_rtl_verilog.do.bak 1717 2018-12-17
lsd2\simulation\modelsim\lsd_run_msim_rtl_verilog.do.bak1 1717 2018-12-17
lsd2\simulation\modelsim\lsd_run_msim_rtl_verilog.do.bak10 1717 2018-12-18
lsd2\simulation\modelsim\lsd_run_msim_rtl_verilog.do.bak2 1717 2018-12-17
lsd2\simulation\modelsim\lsd_run_msim_rtl_verilog.do.bak3 1717 2018-12-17
lsd2\simulation\modelsim\lsd_run_msim_rtl_verilog.do.bak4 1717 2018-12-17
lsd2\simulation\modelsim\lsd_run_msim_rtl_verilog.do.bak5 1717 2018-12-17
lsd2\simulation\modelsim\lsd_run_msim_rtl_verilog.do.bak6 1717 2018-12-17
lsd2\simulation\modelsim\lsd_run_msim_rtl_verilog.do.bak7 1717 2018-12-18
lsd2\simulation\modelsim\lsd_run_msim_rtl_verilog.do.bak8 1717 2018-12-18
lsd2\simulation\modelsim\lsd_run_msim_rtl_verilog.do.bak9 1717 2018-12-18
lsd2\simulation\modelsim\lsd_tb.v 3191 2018-12-19
lsd2\simulation\modelsim\lsd_v.sdo 43332 2018-12-24
lsd2\simulation\modelsim\modelsim.ini 90359 2018-12-18
lsd2\simulation\modelsim\msim_transcript 21469 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib.qdb 49152 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib1_0.qdb 32768 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib1_0.qpg 0 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib1_0.qtl 2440 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib2_0.qdb 32768 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib2_0.qpg 0 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib2_0.qtl 735 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib3_0.qdb 32768 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib3_0.qpg 0 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib3_0.qtl 731 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib4_0.qdb 32768 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib4_0.qpg 0 2018-12-18
lsd2\simulation\modelsim\rtl_work\@_opt\_lib4_0.qtl 8048 2018-12-18
lsd2\simulation\modelsim\rtl_work\_info 1056 2018-12-18
lsd2\simulation\modelsim\rtl_work\_lib.qdb 49152 2018-12-18
lsd2\simulation\modelsim\rtl_work\_lib1_0.qdb 32768 2018-12-18
lsd2\simulation\modelsim\rtl_work\_lib1_0.qpg 0 2018-12-18
lsd2\simulation\modelsim\rtl_work\_lib1_0.qtl 1836 2018-12-18
lsd2\simulation\modelsim\rtl_work\_vmake 29 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_lnsim_ver\_info 10634 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_lnsim_ver\_lib.qdb 49152 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_lnsim_ver\_lib1_9.qdb 32768 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_lnsim_ver\_lib1_9.qpg 3063808 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_lnsim_ver\_lib1_9.qtl 765873 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_lnsim_ver\_vmake 29 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_mf_ver\_info 13782 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_mf_ver\_lib.qdb 65536 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_mf_ver\_lib1_9.qdb 49152 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_mf_ver\_lib1_9.qpg 4923392 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_mf_ver\_lib1_9.qtl 1093292 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_mf_ver\_vmake 29 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_ver\_info 6566 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_ver\_lib.qdb 49152 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_ver\_lib1_4.qdb 32768 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_ver\_lib1_4.qpg 0 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_ver\_lib1_4.qtl 235181 2018-12-18
lsd2\simulation\modelsim\verilog_libs\altera_ver\_vmake 29 2018-12-18
lsd2\simulation\modelsim\verilog_libs\lpm_ver\_info 5227 2018-12-18
lsd2\simulation\modelsim\verilog_libs\lpm_ver\_lib.qdb 49152 2018-12-18
lsd2\simulation\modelsim\verilog_libs\lpm_ver\_lib1_4.qdb 32768 2018-12-18
lsd2\simulation\modelsim\verilog_libs\lpm_ver\_lib1_4.qpg 311296 2018-12-18
lsd2\simulation\modelsim\verilog_libs\lpm_ver\_lib1_4.qtl 575955 2018-12-18
lsd2\simulation\modelsim\verilog_libs\lpm_ver\_vmake 29 2018-12-18
lsd2\simulation\modelsim\verilog_libs\maxii_ver\_info 3473 2018-12-18
lsd2\simulation\modelsim\verilog_libs\maxii_ver\_lib.qdb 49152 2018-12-18

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