Welcome![Sign In][Sign Up]
Location:
Search - wtut_ver.zip

Search list

[source in ebookwtut_ver

Description: ise9.1官方的使用手册中配套用的fpga入门代码-ise9.1 official supporting the use of manual entry code used in FPGA
Platform: | Size: 49152 | Author: 曹静华 | Hits:

[VHDL-FPGA-Verilogwtut_ver

Description: verilog HDL语言编写的数字秒表,仿真已经通过,可供参考-verilog HDL language digital stopwatch, simulation has already been adopted, for reference
Platform: | Size: 26624 | Author: 邢继元 | Hits:

[VHDL-FPGA-Verilogwtut_ver

Description: Verilog语言开发环境ISE例程,适合于初学者-ISE Verilog language development environment routines, suitable for beginners
Platform: | Size: 399360 | Author: jingyizhou | Hits:

[VHDL-FPGA-Verilogwtut_ver.ZIP

Description: 码表程序,完整的verilog工程文件,完整的工程设计流程,包含时序约束,ip核的嵌入,以及DCM模块的使用-Stopwatch program, complete verilog project file, complete engineering design process, including the timing constraints, ip nuclear embedding, as well as the use of DCM module
Platform: | Size: 465920 | Author: luojian | Hits:

CodeBus www.codebus.net